LiveActive security incident?Get immediate response
CWE Reference

CWE-1252: CPU Hardware Not Configured to Support… | Glexia

CWE-1252 (CPU Hardware Not Configured to Support Exclusivity of Write and Execute Operations) weakness overview with consequences, detection methods, mitigations,…

Release 4.20weaknessIncomplete

Glexia's Take · Automated analysis

CWE-1252: CPU Hardware Not Configured to Support Exclusivity of Write and Execute Operations

CPU Hardware Not Configured to Support Exclusivity of Write and Execute Operations represents a recurring weakness pattern that can create exploitable paths when design, validation, or implementation controls are missing.

Executive Impact

  • Confidentiality,Integrity: Execute Unauthorized Code or Commands: Without configuring exclusivity of operations via segregated areas of memory, an attacker may be able to inject malicious code onto memory and later execute it.

Developer Pattern

CWE-1252 is the kind of defect developers can usually prevent with explicit validation, safer framework defaults, and tests that exercise hostile input or unsafe state transitions.

Automation confidence

high confidence from CWE-1252, 4.20.

Generated from the cited source records. This long-tail analysis has not been individually reviewed by a named human.

Official CWE Definition

CWE-1252: CPU Hardware Not Configured to Support Exclusivity of Write and Execute Operations

The CPU is not configured to provide hardware support for exclusivity of write and execute operations on memory. This allows an attacker to execute data from all of memory.

Type
weakness
Abstraction
Base
Status
Incomplete
Source
MITRE CWE definition

Developer And Remediation Guidance

How teams prevent and detect this weakness

Causes

  • MCS51 Microcontroller (based on 8051) does not have a special bit to support write exclusivity. It also does not have an MMU/MPU support. The Cortex-M CPU has an optional MPU that supports up to 8 regions. If the MPU is not configured, then an attacker will be able to inject malicious data into memory and execute it.

Remediation

  • Architecture and Design:
  • Integration:

Detection

  • Code review
  • SAST
  • DAST
  • Focused regression tests

Mappings

Related CVEs, CWEs, and ATT&CK context

Related CWEs

Related CVEs

Related CVE mappings appear after CVE records are cross-indexed.

Open CWE CVE mapping

ATT&CK Relevance

ATT&CK relevance is shown only when reviewed or responsibly inferred.