CWE-1248: Semiconductor Defects in Hardware Logic with… | Glexia
CWE-1248 (Semiconductor Defects in Hardware Logic with Security-Sensitive Implications) weakness overview with consequences, detection methods, mitigations,…
Glexia's Take · Automated analysis
CWE-1248: Semiconductor Defects in Hardware Logic with Security-Sensitive Implications
Semiconductor Defects in Hardware Logic with Security-Sensitive Implications represents a recurring weakness pattern that can create exploitable paths when design, validation, or implementation controls are missing.
Executive Impact
- Availability Access Control: DoS: Instability: If such faults occur in security-sensitive hardware modules, the security objectives of the hardware module may be compromised.
Developer Pattern
CWE-1248 is the kind of defect developers can usually prevent with explicit validation, safer framework defaults, and tests that exercise hostile input or unsafe state transitions.
Automation confidence
high confidence from CWE-1248, 4.20.
Generated from the cited source records. This long-tail analysis has not been individually reviewed by a named human.
Official CWE Definition
CWE-1248: Semiconductor Defects in Hardware Logic with Security-Sensitive Implications
The security-sensitive hardware module contains semiconductor defects.
A semiconductor device can fail for various reasons. While some are manufacturing and packaging defects, the rest are due to prolonged use or usage under extreme conditions. Some mechanisms that lead to semiconductor defects include encapsulation failure, die-attach failure, wire-bond failure, bulk-silicon defects, oxide-layer faults, aluminum-metal faults (including electromigration, corrosion of aluminum, etc.), and thermal/electrical stress. These defects manifest as faults on chip-internal signals or registers, have the effect of inputs, outputs, or intermediate signals being always 0 or always 1, and do not switch as expected.
Developer And Remediation Guidance
How teams prevent and detect this weakness
Causes
- The network-on-chip implements a firewall for access control to peripherals from all IP cores capable of mastering transactions. Post-manufacture testing must be performed to ensure that hardware logic implementing security functionalities is defect-free.
Remediation
- Testing: While semiconductor-manufacturing companies implement several mechanisms to continuously improve the semiconductor manufacturing process to ensure reduction of defects, some defects can only be fixed after manufacturing. Post-manufacturing testing of silicon die is critical. Fault models such as stuck-at-0 or stuck-at-1 must be used to develop post-manufacturing test cases and achieve good coverage. Once the silicon packaging is done, extensive post-silicon testing must be performed to ensure that hardware logic implementing security functionalities is defect-free.
- Operation: Operating the hardware outside device specification, such as at extremely high temperatures, voltage, etc., accelerates semiconductor degradation and results in defects. When these defects manifest as faults in security-critical, hardware modules, it results in compromise of security guarantees. Thus, operating the device within the specification is important.
Detection
- Code review
- SAST
- DAST
- Focused regression tests
Mappings
Related CVEs, CWEs, and ATT&CK context
Related CWEs
ATT&CK Relevance
ATT&CK relevance is shown only when reviewed or responsibly inferred.