CVE-2026-23213: drm/amd/pm: Disable MMIO access during SMU Mode 1 reset
In the Linux kernel, the following vulnerability has been resolved:
drm/amd/pm: Disable MMIO access during SMU Mode 1 reset
During Mode 1 reset, the ASIC undergoes a reset cycle and becomes
temporarily inaccessible via PCIe. Any attempt to access MMIO registers
during this window (e.g., from interrupt handlers or other driver threads)
can result in uncompleted PCIe transactions, leading to NMI panics or
system hangs.
To prevent this, set the `no_hw_access` flag to true immediately after
triggering the reset. This signals other driver components to skip
register accesses while the device is offline.
A memory barrier `smp_mb()` is added to ensure the flag update is
globally visible to all cores before the driver enters the sleep/wait
state.
(cherry picked from commit 7edb503fe4b6d67f47d8bb0dfafb8e699bb0f8a4)
Security readout for executives and security teams
Plain-English summary
This Linux kernel flaw can cause systems with AMD GPU power-management reset activity to hang or panic. The issue occurs when the GPU is temporarily unavailable during reset but other driver paths still try to access hardware registers. Business impact is mainly availability loss, not confirmed data exposure.
Executive priority
Treat as a reliability and uptime issue for AMD GPU Linux fleets. It is not currently evidenced as actively exploited, but production systems that depend on GPU availability should receive expedited kernel maintenance.
Technical view
In drm/amd/pm, SMU Mode 1 reset makes the ASIC temporarily inaccessible over PCIe. Concurrent MMIO register access during that window may leave PCIe transactions unfinished, causing NMI panics or system hangs. The fix marks no_hw_access true immediately after reset and uses smp_mb() for cross-core visibility.
Likely exposure
Exposure is most likely on Linux systems using AMD GPU drivers and affected kernel builds. The source metadata lists Linux as affected across versions including 5.9, 6.12.70, 6.18.10, and 6.19, but distro backport status must be checked separately.
Exploitation context
The provided sources do not show CISA KEV listing, active exploitation, public exploit code, or remote attack evidence. The described failure mode is a kernel driver availability issue triggered by hardware reset timing and concurrent register access.
Researcher notes
No CVSS, CWE, or detailed affected CPEs were provided. The core race is operational: MMIO access continues while the ASIC is offline during Mode 1 reset. Validation should focus on patch presence and reset-related panic evidence, not offensive reproduction.
Mitigation direction
Apply vendor or distribution kernel updates containing the referenced stable fixes.
Prioritize AMD GPU Linux systems where hangs affect production availability.
Check distro advisories because backports may differ from upstream version numbers.
Schedule reboot and regression testing for patched kernel rollout.
Validation and detection
Inventory Linux hosts using AMD GPUs and the amdgpu driver.
Compare running kernel packages with distro advisories and referenced stable commits.
Review system logs for NMI panics or hangs around AMDGPU reset events.
Confirm patched builds include the no_hw_access and smp_mb() fix path.
Generated from the cited source records. This long-tail analysis has not been individually reviewed by a named human.
Potential ATT&CK relevance
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3Timeline events
0ADP providers
4Source links
Vulnerability timeline
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CVE publishedCVE Program
The CVE record was published.
Feb 18, 2026, 14:21 UTC (UTC+00:00)
CVE updatedCVE Program
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