Security readout for executives and security teams
Plain-English summary
CVE-2025-51678 describes a high-severity reliability flaw in the PicoRV32 RISC-V CPU core at commit 87c89a. A mismatch involving PCPI instruction handling and a memory address can cause unexpected behavior, with availability impact rated high. The source bundle does not identify affected commercial products or a confirmed patch.
Executive priority
Treat this as a targeted engineering validation item for teams using PicoRV32. It is high severity, but current evidence does not identify broad product exposure or active exploitation. Priority should rise if PicoRV32 is present in production, safety-sensitive, or remotely reachable systems.
Technical view
The CVE links the issue to PicoRV32 commit 87c89a and describes a PCPI INSN versus memory-address mismatch. The record maps it to CWE-119 and CWE-704 and assigns CVSS 3.1 score 7.5, with no confidentiality or integrity impact and high availability impact. Technical details are limited in the provided sources.
Likely exposure
Exposure is most likely where PicoRV32 at or derived from commit 87c89a is used in RISC-V FPGA, ASIC, or SoC designs. The provided CVE data lists no CPEs, vendor names, product versions, or downstream affected devices.
Exploitation context
The source bundle does not show active exploitation, and KEV status is false. Public references appear to be disclosure and research material. The CVSS vector indicates network reachability, no privileges, and no user interaction, but the bundle does not document a real-world exploit path.
Researcher notes
Evidence is sparse. The CVE names a specific PicoRV32 commit and broad weakness classes, but affected versions, fix commit, reproducer details, and downstream product mapping are not provided in the bundle. Avoid assuming exploitability beyond the stated CVSS and references.
Mitigation direction
Inventory designs for PicoRV32 commit 87c89a or derived forks.
Review the upstream GitHub issue for maintainer guidance or fixes.
Check vendor or integrator guidance for downstream products using PicoRV32.
Prioritize replacement or verification if the affected core is production-facing.
Track the CVE record for affected-product and remediation updates.
Validation and detection
Search hardware manifests, HDL dependencies, and build metadata for PicoRV32.
Confirm the exact upstream commit or fork baseline in each design.
Review PCPI integration tests for instruction and memory-address mismatch behavior.
Check whether any downstream vendor advisory maps this CVE to your product.
Document unknowns where product mapping or fix status remains unavailable.
Generated from the cited source records. This long-tail analysis has not been individually reviewed by a named human.
Potential ATT&CK relevance
Conservative CVE-to-ATT&CK context
These mappings and lookup hints may be relevant to the vulnerability behavior, CWE, affected product, or exposure path. Glexia-inferred context is not an official MITRE, ATT&CK, CWE, or CVE Program mapping.
ATT&CK lookup starting points
Use these exact CWE pages and searches to review the Glexia ATT&CK library from this CVE's weakness and description context.
cwe · low confidence lookup
CWE-119: Exact CWE lookup
Use the exact CWE identifier as the starting point before reviewing related ATT&CK behavior. Open the exact CWE lookup page first, then review the ATT&CK searches from that MITRE weakness context. This is a Glexia lookup hint, not an official ATT&CK mapping.
Use the exact CWE identifier as the starting point before reviewing related ATT&CK behavior. Open the exact CWE lookup page first, then review the ATT&CK searches from that MITRE weakness context. This is a Glexia lookup hint, not an official ATT&CK mapping.
These fields come from the CVE record and ADP containers, not from Glexia's Take. They preserve time-varying source decisions such as CISA SSVC, KEV status, CVSS metrics, and provider references.
We collect every scored CVSS vector available in the official CNA and ADP containers. When more than one version is present, the table keeps the source vectors side by side instead of collapsing them into the highest score.
CWE links open Glexia weakness intelligence pages with official CWE context, developer remediation guidance, and related CVE mappings.
CWE-119 · source CWE mapping
Improper Restriction of Operations within the Bounds of a Memory Buffer
Improper Restriction of Operations within the Bounds of a Memory Buffer represents a recurring weakness pattern that can create exploitable paths when design, validation, or implementation controls are missing.
Incorrect Type Conversion or Cast represents a recurring weakness pattern that can create exploitable paths when design, validation, or implementation controls are missing.